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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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STA321 데이터시트(PDF) 130 Page - STMicroelectronics |
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STA321 데이터시트(HTML) 130 Page - STMicroelectronics |
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130 / 157 page  Register description STA321 130/157 Doc ID 15351 Rev 3 PLLCFG0 Address: 0xC0 Type: RW Reset: 0x00 Description: PLLCFG1 Address: 0xC1 Type: RW Reset: 0x00 Description: See also Section 5.3: Fractional PLL on page 31 76 54 32 10 PLL_DPROG PLL_FR_CTRL PLL_DDIS PLL_IDF [7] 0: PLL takes the internal settings 1: PLL takes the register settings [6] PLL_FR_CTRL 0: fractional frequency synthesis disabled 1: fractional frequency synthesis enabled [5:4] PLL_DDIS PLL dither disable x0: triangular PDF dither input enabled x1: triangular PDF dither input disabled 0x: rectangular PDF dither input enabled 1x: rectrangular PDF dither input disabled [3:0] PLL_IDF Set the input division factor of the PLL (seeSection 5.3: Fractional PLL on page 31) 76 54 32 10 PLL_FRAC[15:8] [7:0] PLL_FRAC[15:8] The MSBs of PLL_FRAC[15:0] which is used to set the PLL multiplication factor |
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