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IMX53IEC 데이터시트(PDF) 17 Page - Freescale Semiconductor, Inc

부품명 IMX53IEC
상세설명  i.MX53 Applications Processors for Industrial Products
PDF  173 Pages
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제조업체  FREESCALE [Freescale Semiconductor, Inc]
홈페이지  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

IMX53IEC 데이터시트(HTML) 17 Page - Freescale Semiconductor, Inc

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Electrical Characteristics
i.MX53 Applications Processors for Industrial Products, Rev. 6
Freescale Semiconductor
17
4.1.2
Thermal Resistance
4.1.2.1
TEPBGA-2 Package Thermal Resistance
Table 5 provides the TEPBGA-2 package thermal resistance data.
Input voltage on USB_OTG_DP, USB_OTG_DN,
USB_H1_DP, USB_H1_DN pins
USB_DP/USB_DN
-0.3
3.631
V
Input/Output Voltage Range
Vin/Vout
-0.5
OVDD +0.32
V
ESD Damage Immunity:
Vesd
V
• Human Body Model (HBM)
• Charge Device Model (CDM)
—
—
2000
500
Storage Temperature Range
TSTORAGE
-40
150
oC
1 USB_DN and USB_DP can tolerate 5 V for up to 24 hours.
2 The term OVDD in this section refers to the associated supply rail of an input or output. The association is described in
Table 111 on page 148. The maximum range can be superseded by the DC tables.
Table 5. TEPBGA-2 Package Thermal Resistance Data
Rating
Board
Symbol
Value
Unit
Junction to Ambient (natural convection)1, 2
1 Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)
temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal
resistance.
2 Per JEDEC JESD51-2 with the single layer board horizontal. Board meets JESD51-9 specification.
Single layer board
(1s)
RθJA
28
°C/W
Junction to Ambient (natural convection)1, 2, 3
3 Per JEDEC JESD51-6 with the board horizontal.
Four layer board
(2s2p)
RθJA
16
°C/W
Junction to Ambient (at 200 ft/min)1, 3
Single layer board
(1s)
RθJMA
21
°C/W
Junction to Ambient (at 200 ft/min)1, 3
Four layer board
(2s2p)
RθJMA
13
°C/W
Junction to Board4
4 Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. Board temperature is measured on
the top surface of the board near the package.
—RθJB
6°C/W
Junction to Case5
5 Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method
1012.1).
—RθJC
4°C/W
Junction to Package Top (natural convection)6
6 Thermal characterization parameter indicating the temperature difference between package top and the junction temperature
per JEDEC JESD51-2.
—
ΨJT
4°C/W
Table 4. Absolute Maximum Ratings (continued)
Parameter Description
Symbol
Min
Max
Unit



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