AD9523-1SLASHPCBZ datasheet(2/60 Pages) AD

2 / 60 page

AD9523-1

Rev. B | Page 2 of 60

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Conditions ..................................................................................... 3

Supply Current.............................................................................. 3

Power Dissipation......................................................................... 5

REFA, REFA, REFB, REFB, OSC_IN, OSC_IN, and ZD_IN,

ZD_IN Input Characteristics ...................................................... 6

OSC_CTRL Output Characteristics .......................................... 6

REF_TEST Input Characteristics ............................................... 6

PLL1 Output Characteristics ...................................................... 7

OUT0, OUT0 to OUT13, OUT13 Distribution Output

Characteristics .............................................................................. 7

Timing Alignment Characteristics............................................. 8

Jitter and Noise Characteristics .................................................. 9

PLL2 Characteristics .................................................................... 9

Logic Input Pins—PD, SYNC, RESET, EEPROM_SEL,

REF_SEL ........................................................................................ 9

Status Output Pins—STATUS1, STATUS0 ............................. 10

Serial Control Port—SPI Mode ................................................ 10

Serial Control Port—I2C Mode ................................................ 11

Absolute Maximum Ratings.......................................................... 12

Thermal Resistance .................................................................... 12

ESD Caution................................................................................ 12

Pin Configuration and Function Descriptions........................... 13

Typical Performance Characteristics ........................................... 16

Input/Output Termination Recommendations.......................... 19

Terminology .................................................................................... 20

Theory of Operation ...................................................................... 21

Detailed Block Diagram ............................................................ 21

Overview ..................................................................................... 21

Component Blocks—Input PLL (PLL1).................................. 22

Component Blocks—Output PLL (PLL2) .............................. 23

Clock Distribution ..................................................................... 25

Zero Delay Operation................................................................ 27

Serial Control Port ......................................................................... 28

SPI/I2C Port Selection................................................................ 28

I2C Serial Port Operation .......................................................... 28

SPI Serial Port Operation .......................................................... 31

SPI Instruction Word (16 Bits)................................................. 32

SPI MSB/LSB First Transfers .................................................... 32

EEPROM Operations..................................................................... 35

Writing to the EEPROM ........................................................... 35

Reading from the EEPROM ..................................................... 35

Programming the EEPROM Buffer Segment......................... 36

Power Dissipation and Thermal Considerations ....................... 38

Clock Speed and Driver Mode ................................................. 38

Evaluation of Operating Conditions........................................ 38

Thermally Enhanced Package Mounting Guidelines............ 39

Control Registers ............................................................................ 40

Control Register Map ................................................................ 40

Control Register Map Bit Descriptions ................................... 45

Outline Dimensions ....................................................................... 58

Ordering Guide .......................................................................... 58

REVISION HISTORY

3/11—Rev. A to Rev. B

Added Table Summary, Table 8 ...................................................... 7

Changes to Figure 24...................................................................... 21

Changes to EEPROM Operations Section and Writing to the

EEPROM Section............................................................................ 35

Changes to Addr (Hex) 0x01A, Bits[4:3], Table 30.................... 40

Changes to Bits[4:3], Table 40....................................................... 47

12/10—Rev. 0 to Rev. A

Changes to General Description Section .......................................1

Changes to Frequency Range, Table 11 ..........................................9

Changes to PLL2 General Description Section .......................... 23

Changes to Table 47, Address 0x0F3, Bit 1 ................................. 48

10/10—Revision 0: Initial Version

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