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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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STM8S103F2 데이터시트(PDF) 85 Page - STMicroelectronics |
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STM8S103F2 데이터시트(HTML) 85 Page - STMicroelectronics |
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85 / 117 page  Figure 41: SPI timing diagram - master mode (1) ai14136b CPHA= 0 MOSI OUTUT MISO INP UT CPHA= 0 MS BIN M SB OUT BI T6 IN LSB OUT LSB IN CPOL=0 CPOL=1 B I T1 OUT NSS input tc(SCK) tw(SCKH) tw(SCKL) tr(SCK) tf(SCK) th(MI) High CPHA=1 CPHA=1 CPOL=0 CPOL=1 tsu(MI) tv(MO) th(MO) 1. Measurement points are made at CMOS levels: 0.3 VDD and 0.7 VDD. I 2C interface characteristics 10.3.9 Table 44: I 2C characteristics Unit Fast mode I 2C(1) Standard mode I 2C Parameter Symbol Max (2) Min (2) Max (2) Min (2) μs - 1.3 - 4.7 SCL clock low time tw(SCLL) - 0.6 - 4.0 SCL clock high time tw(SCLH) ns - 100 - 250 SDA setup time tsu(SDA) 900 (3) 0 (4) - 0 (3) SDA data hold time th(SDA) 300 - 1000 - SDA and SCL rise time tr(SDA) tr(SCL) 300 - 300 - SDA and SCL fall time tf(SDA) tf(SCL) μs - 0.6 - 4.0 START condition hold time th(STA) - 0.6 - 4.7 Repeated START condition setup time tsu(STA) 85/117 DocID15441 Rev 9 Electrical characteristics STM8S103K3 STM8S103F3 STM8S103F2 |
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