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STM8S103F2 데이터시트(PDF) 116 Page - STMicroelectronics |
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STM8S103F2 데이터시트(HTML) 116 Page - STMicroelectronics |
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116 / 117 page ![]() Changes Revision Date Added note for Px_IDR registers in Table 7: I/O port hardware register map. Added recommendation concerning NRST pin level, and power consumption sensitive applications, above Figure 38: Recommended reset pin protection. Removed typical HSI accuracy curve in Internal clock sources and timing characteristics. Renamed package type 2 into package pitch and added pitch code "C" in Figure 53: STM8S103x access line ordering information scheme, and added UFQFPN20 in STM8S103 FASTROM microcontroller option list. Updated disclaimer. Updated notes related to VCAP in Table 19: General operating conditions. 8 04-Apr-2012 Added values of tR/tF for 50 pF load capacitance, and updated note in Table 38: I/O static characteristics. Updated typical and maximum values of RPU in Table 38: I/O static characteristics and Table 42: NRST pin characteristics. Changed SCK input to SCK output in SPI serial peripheral interface Modified Figure 47: 20-lead, ultra thin, fine pitch quad flat no-lead package outline (3 x 3)to add package top view. Added SDIP32 package. 9 26-Jun-2012 DocID15441 Rev 9 116/117 STM8S103K3 STM8S103F3 STM8S103F2 Revision history |
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