STC5425 datasheet(39/48 Pages) CONNOR-WINFIELD

39 / 48 page

Page 39 of 48 TM113

Rev:P1.3

Date: September 20, 2011

STC5425

Line Card Clock

Data sheet

Preliminary

CLK8K_Sel, 0x59 (R/W)

CLK2K_Sel, 0x5A (R/W)

Selects duty cycle of the 8kHz and 2kHz frame clock output generated from synthesizer F and determine

whether the CLK8K or CLK2K is inverted. Default is not inverted and pulsed on the rising edge.

Default value: 63 (50% duty cycle, not inverted)

Ref_Freq, 0x5B (R/W)

Select the integer N for the manually acceptable reference frequency at Nx8kHz (N is integer from 1 to 32767)

for REF1~REF5. Select which of reference input depends on the index selected at the register

Ref_Index_Selector.

Setting this register to 0 is to enable the automatically detection for reference input frequency. The auto-detect

acceptable reference input frequencies is shown in Table 4.

Setting integer N (from 1 to 32767) at this register allows user to manually select the acceptable reference

input frequency at the integer multiple of 8kHz, range from 8kHz to 262.136MHz. For instance, user can select

integer N = 32000 to manually accept frequency at 32000x8kHz = 256MHz.

Default value: 0

Address

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

0x59

Not used

Invert

Duty Cycle Select

0x5A

Not used

Invert

Duty Cycle Select

Bit 5 ~ 0

Duty Cycle Select

Disabled and tri-state

1~62

Pulse width 1 to 62 cycle of 155.52MHz

50% duty cycle

Bits 6

Invert

Not inverted (frame pulsed on rising edge)

Inverted (frame pulsed on falling edge)

Address

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

0x5B

Lower 8 bits of integer N Select

0x5C

Not used

Higher 7 bits of integer N Select

Field Value

Integer N Select

Enable auto detection for reference input

1~32767

Integer N for the manual acceptable reference frequency

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