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SIO1007 데이터시트(PDF) 62 Page - Microchip Technology

부품명 SIO1007
상세설명  LPC Super I/O LPC IrDA Hot Docking Chip with UART
PDF  108 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

SIO1007 데이터시트(HTML) 62 Page - Microchip Technology

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SIO1007
DS00002020A-page 62
 2005 - 2015 Microchip Technology Inc.
18.4.5
CR04
CR04 can only be accessed in the configuration state and after the CSR has been initialized to 04H.
Note 18-5
MIDI Support: The Musical Instrumental Digital Interface (MIDI) operates at 31.25Kbaud (+/-1%).
18.4.6
CR05
Register CR05 is reserved. The default value of this register after power up is 00H.
18.4.7
CR06
Register CR06 is reserved. The default value of this register after power up is 00H.
18.4.8
CR07
CR07 can only be accessed in the configuration state and after the CSR has been initialized to 07H. CR07 controls auto
power management.
18.4.9
CR08
Register CR08 is reserved. The default value of this register after power up is 00H.
TABLE 18-7:
CR04
UART Miscellaneous
Type: R/W
Default: 0X00 ON VCC POR
BIT NO.
BIT NAME
DESCRIPTION
3:0
Read Only. A read returns “0”.
4MIDI 1 (Note 18-5)
Serial Clock Select Port 1: A low level on this bit disables MIDI support
(default). A high level on this bit enables MIDI support.
5MIDI 2 (Note 18-5)
Serial Clock Select Port 2: A low level on this bit disables MIDI support
(default). A high level on this bit enables MIDI support.
7:6
Read Only. A read returns “0”.
TABLE 18-8:
CR07
Auto Power Management and Boot Drive Select
Type: R/W
Default: 0X00 ON VCC POR;
BITS[6:5] = 00 ON PCI RESET
BIT NO.
BIT NAME
DESCRIPTION
4:0
Reserved
Read Only. A read returns 0.
5
UART 2 Enable
This bit controls the AUTOPOWER DOWN feature of the UART2. The
function is:
0 = Auto powerdown disabled (default)
1 = Auto powerdown enabled
This bit is reset to the default state by POR or a hardware reset.
6
UART 1 Enable
This bit controls the AUTOPOWER DOWN feature of the UART1. The
function is:
0 = Auto powerdown disabled (default)
1 = Auto powerdown enabled
This bit is reset to the default state by POR or a hardware reset.
7
Reserved
Read Only. A read returns 0.



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