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SIO1007 데이터시트(PDF) 10 Page - Microchip Technology

부품명 SIO1007
상세설명  LPC Super I/O LPC IrDA Hot Docking Chip with UART
PDF  108 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

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SIO1007
DS00002020A-page 10
 2005 - 2015 Microchip Technology Inc.
58
nRI1
Active low Ring Indicator inputs for the
serial port. Handshake signal which
notifies the UART that the telephone
ring signal is detected by the modem.
The CPU can monitor the status of nRI
signal by reading bit 6 of Modem Status
Register (MSR). A nRI signal state
change from low to high after the last
MSR read will set MSR bit 2 to a 1. If
bit 3 of Interrupt Enable Register is set,
the interrupt is generated when nRI
changes state.
Note:
Bit 6 of MSR is the
complement of nRI.
IVTR
N/A
INFRARED INTERFACE (3)
50
IRRX2
IR Receive
IS
VTR
49
IRTX2
IR Transmit
O12
VCC
51
IRMODE/
IRRX3
IR mode.IR Receive 3.
O6/
IS
VTR
VTR
MISCELLANEOUS (34)
34
GP15
/CIRRX
Dedicated General Purpose
Input/Output.
Consumer IR Receiver
IS/O8/OD8/
IS
VTR
VCC
4-4
35
GP16
/CIRTX
Dedicated General Purpose
Input/Output.
Consumer IR Transmitter
IO12/OD12/
O12
VTR
VCC
4-4
4-5
27,28,3
4,35,36,
38,39,4
9,41,43,
44,46,6
1
GP10,GP11
GP15-GP17
GP30-GP37
Dedicated General Purpose
Input/Output.
IO8/OD8
VTR
VCC
4-4
30
GP12/
nIO_SMI
General Purpose Input/Output.
Active low System Management
Interrupt Output.
I(I/O12/OD12
)
/(O12/OD12
VTR,
VCC
4-4
32
GP13/
IRQIN1/
CLKI32
General Purpose Input/Output.
External Interrupt Input. Steerable onto
one of the 15 Serial IRQs.
32kHz suspend clock input.
(IS/O8/OD8)/
IS
IS
VTR
VCC
4-4
33
GP14/
IRQIN2
General Purpose Input/Output.
External Interrupt Input. Steerable onto
one of the 15 Serial IRQs.
(I/O8/OD8)/
I
VTR,
VCC
VCC
4-4
47
nIO_PME
This active low Power Management
Event signal allows this device to
request wakeup.
(O12/OD12)
VTR
Note:
The “n” as the first letter of a signal name or the “#” as the suffix of a signal name indicates an “Active Low”
signal.
TABLE 4-1:
PIN FUNCTIONS (CONTINUED)
STQFP
Pin #
Name
Description
Buffer
Name
Input
Buffer
Power
Well
Output
Buffer
Power
Well
Notes



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