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PC87591L 데이터시트(PDF) 384 Page - National Semiconductor (TI) |
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PC87591L 데이터시트(HTML) 384 Page - National Semiconductor (TI) |
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384 / 437 page ![]() 7.0 Device Specifications (Continued) www.national.com 384 Revision 1.07 7.6.2 Reset Timing Figure 129. Internal Power-Up Reset Notes: 1. Either WATCHDOG, Debugger I/F or Power-Up reset. 2. Valid on Power-Up reset only. Figure 130. Warm Hardware Reset Symbol Figure Description Reference Conditions Min Max Unit tSUPUP 130 Supply wake-up time to 95% VCC After VCC >VCCON 1ms tIRST 130 Internal or power-on reset time Power stable to end of 16th clock cycle of CLK 16 * tCLK + t32KD 16 * tCLK + t32KD +t32KW - tIPLv 130 Valid time: Internal strap pull-up resistors Before end of 16th clock cycle of CLK 16 * tCLK - tEPLv 130 Valid time: External strap pull-up resistors Before end of 16th clock cycle of CLK 6 * tCLK - tWRST 130 RESET1-2 width RESET1-2 FE to RESET1-2 RE 3 * tCLK - VCC (Power) 1 CLK Internal Reset tIRST Internal Straps2 tIPLv Internal tSUPUP 0.95 V CC VCCONmin Reset Event 1 tEPLv (Pull-down) External Straps (Pull-up) Strap Sampling Time CLK RESET1-2 tWRST |
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