PC87591L datasheet(164/437 Pages) NSC

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4.10 TIMER AND WATCHDOG (TWD)

The Timer and WATCHDOG module (TWD) generates the clocks and interrupts used for timing periodic functions in the

system. It also provides WATCHDOG protection over software execution.

The TWD provides flexibility in system configuration by enabling the configuration of various clock ratios. After setting the

TWD configuration, the software can lock it to give a higher level of protection against erroneous software action. Once a

section of the TWD is locked, only reset releases it. See Figure 59 for the TWD block diagram.

4.10.1 Features

●

32.768 KHz input clock

●

Programmable pre-scale counter

●

16-bit programmable periodic interrupt timer

●

8-bit WATCHDOG counter

●

WATCHDOG signal generation in response to failure detection, such as:

— WATCHDOG service performed too early

— WATCHDOG service performed too late

— Wrong DATA used in a service by data match

4.10.2 Functional Description

Input Clock

The TWD bases all its counting activities on a 32.768 KHz clock. The WATCHDOG can count using a division of the 32 KHz

clock (either T0OUT or T0IN).

(TWCP)

32.768 KHz

16-Bit Timer

5-Bit Pre-Scale

Counter

WATCHDOG

Peripheral Bus

T0OUT

WATCHDOG

T0IN

FREEZE

TWDT0 Register

WDCNT

WDSDM

WATCHDOG

Service

Logic

Figure 59. Timer and WATCHDOG Block Diagram

from RTC

(DEV Env. only)

to ICU

WDCT0I bit (TWCFG Register)

T0IN

to ACM

Signal

to Reset Circuit

PC87591L 데이터시트(PDF) 164 Page - National Semiconductor (TI)

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