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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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GXM 데이터시트(PDF) 163 Page - National Semiconductor (TI) |
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GXM 데이터시트(HTML) 163 Page - National Semiconductor (TI) |
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163 / 244 page  Revision 3.1 163 www.national.com Integrated Functions (Continued) 4.6.8.2 PCI Write Transaction A PCI write transaction is similar to a PCI read transac- tion, consisting of an address phase and one or more data phases. Since the master provides both address and data, no turnaround cycle is required following the address phase. The data phases work the same for both read and write transactions. Figure 4-19 illustrates a write transaction. The address phasebeginsonclock 2whenFRAME#is asserted. The first and second data phases complete without delays. During data phase 3, the target inserts three wait cycles by deasserting TRDY#. For additional information refer to Chapter 3.3.2, Write Transaction, of the PCI Local Bus Specification, Revision 2.1. Figure 4-19. Basic Write Operation CLK FRAME# AD C/BE# DATA-2 DATA-3 ADDR IRDY# TRDY# DEVSEL# BUS TRANSACTION ADDR PHASE DATA PHASE DATA PHASE DATA PHASE DATA-1 BE#’s-2 BE#’s-3 BUS CMD BE#’s-1 |
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