GXM datasheet(233/244 Pages) NSC

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Instruction Set (Continued)

PUNPCKLBW Unpack Low Packed Byte, Data to Packed Words

MMX Register 2 to MMX Register 1

0F60 [11 mm1 mm2]

MMX reg 1 [word] <--interleave-- MMX reg 1 [low byte], MMX reg 2 [low byte]

1/1

Memory to MMX Register

0F60 [11 mm reg]

MMX reg [word] <--interleave-- memory [low byte], MMX reg [low byte]

1/1

PUNPCKLDQ Unpack Low Packed Dword, Data to Qword

MMX Register 2 to MMX Register 1

0F62 [11 mm1 mm2]

MMX reg 1 [word] <--interleave-- MMX reg 1 [low dword], MMX reg 2 [low

dword]

1/1

Memory to MMX Register

0F62 [11 mm reg]

MMX reg [word] <--interleave-- memory [low dword], MMX reg [low dword]

1/1

PUNPCKLWD Unpack Low Packed Word, Data to Packed Dwords

MMX Register 2 to MMX Register 1

0F61 [11 mm1 mm2]

MMX reg 1 [word] <--interleave-- MMX reg 1 [low word], MMX reg 2 [low word]

1/1

Memory to MMX Register

0F61 [11 mm reg]

MMX reg [word] <--interleave-- memory [low word], MMX reg [low word]

1/1

PXOR Bitwise XOR

MMX Register 2 to MMX Register 1

0FEF [11 mm1 mm2]

MMX reg 1 [qword] <--logic exclusive OR-- MMX reg 1 [qword], MMX reg 2

[qword]

1/1

Memory to MMX Register

0FEF [11 mm reg]

MMX reg [qword] <--logic exclusive OR-- memory[qword], MMX reg [qword]

1/1

Table 9-31. MMX Instruction Set Summary (Continued)

MMX Instructions

Opcode

Operation and Clock Count (Latency/Throughput)

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