MT9072AB datasheet(159/275 Pages) ZARLINK

159 / 275 page

MT9072

Data Sheet

159

Zarlink Semiconductor Inc.

17.2.1.2

Binary Address

(A10-A0)

Hex

Address

Accessed

Processor

Access

ST-BUS

Access

yyyy 0000 xxxx

Y0X,YFX

Master Control

R/W

---

yyyy 0001 xxxx

Y1X

Master Status

---

yyyy 0010 xxxx

Y2X

Latched Status

---

yyyy 0011 xxxx

Y3X

Interrupt Status

---

yyyy 0100 xxxx

Y4X

Interrupt Mask Control

R/W

---

yyyy 0101 xxxx

Y5X-Y6X

Transmit CAS Data

R/W

CSTi

yyyy 0110 xxxx

Y7X-Y8X

Receive CAS Data

CSTo

yyyy 0111 xxxx-

yyyy 1000 xxxx

Y9X-YAX

Timeslot 0-31 Control

R/W

---

yyyy 1001xxxx

YB0-YBF

Transmit National Bit Buffers

R/W

yyyy 1010 xxxx

YC0-YCF

Receive National Bit Buffers

yyyy indicates 9 binary (0000 to 1000) possibilities, 0000 to 0111 representing a read or write to1 of 8 framers,

1000 representing a write only to all framers, or a read/write to one of the common registers (904,912,910,

911,902,903)

Y is the hex equivalent of yyyy

xxxx indicates all (0000 to 1111) binary possibilities

X is the hex equivalent of xxxx

Table 130 - Register Group Address (Y00 - YFF) Summary (E1)

MT9072AB 데이터시트(PDF) 159 Page - Zarlink Semiconductor Inc

MT9072AB 데이터시트(HTML) 159 Page - Zarlink Semiconductor Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL