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PM6344 데이터시트(PDF) 21 Page - PMC-Sierra, Inc

부품명 PM6344
상세설명  QUADRUPLE E1 FRAMER
PDF  256 Pages
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제조업체  PMC [PMC-Sierra, Inc]
홈페이지  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM6344 데이터시트(HTML) 21 Page - PMC-Sierra, Inc

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STANDARD PRODUCT
PMC-Sierra, Inc.
PM6344 EQUAD
PMC-951013
ISSUE 5
QUADRUPLE E1 FRAMER
8
5
BLOCK DIAGRAM
RFDL
HDLC
Receiver
PMON
Performance
Monitor
Counters
BRIF
Backplane
Receive
Interface
ELST
Elastic
Store
SIGX
Signalling
Extractor,
Trunk
Condition
XFDL
HDLC
Transmitter
TRAN
BasicTransmitter:
Frame Generation,
Alarm Insertion,
Trunk Conditioning
Line Coding
PCSC
Per-channel
Controller:
Signalling,
Idle Insert
DTIF
Digital
Transmit
Interface
BTIF
Backplane
Transmit
Interface
TOPS
Timing Options
RECEIVER
TRANSMITTER
Internal
Bus
MPIF
Micro-
Processor
Interface
BRPCM/BRDP[1:4]
BRSIG/BRDN[1:4]
BRFPO[1:4]
RCLKO[1:4]
RFP[1:4]
RDLCLK/
RDLEOM[1:4]
RDLSIG/
RDLINT[1:4]
TDP/TDD[1:4]
TCLKO[1:4]
TDN/TFLG[1:4]
TDLSIG/
TDLINT[1:4]
TDLCLK/
TDLUDR[1:4]
MRD*
* These signals are shared between all four framers.
XCLK/VCLK*
RDN/RLCV[1:4]
BTPCM/BTDP[1:4]/
MTD*
BTSIG/BTDN[1:4]
BRFPI*/MRFPI*
BRCLK*/MRCLK*
RCLKI[1:4]
RDP/RDD[1:4]
TCLKI[1:4]
BTCLK[1:4]/
MTCLK*
BTFP[1:4]/MTFP*
INTB*
D[7:0]*
A[9:0]*
RDB*
WRB*
CSB*
ALE*
RSTB*
MENB*
CDRC
Clock and
Data
Recovery
DJAT
Digital Jitter
Attenuator
DJAT
Digital Jitter
Attenuator
Optional connections are shown with dashed lines.
FRMR
Framer:
Frame
Alignment,
Alarm
Detection
DRIF
DS-1
Receive
Interface
Optional placement



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