PM6344 datasheet(96/256 Pages) PMC

96 / 256 page

STANDARD PRODUCT

PMC-Sierra, Inc.

PM6344 EQUAD

PMC-951013

ISSUE 5

QUADRUPLE E1 FRAMER

DBCTRL:

The DBCTRL bit is used to pass control of the data bus drivers to the CSB

pin. When the DBCTRL bit is set to logic 1, the CSB pin controls the output

enable for the data bus. While the DBCTRL bit is set, holding the CSB pin

high causes the EQUAD to drive the data bus and holding the CSB pin low

tri-states the data bus. The DBCTRL bit overrides the HIZDATA bit. The

DBCTRL bit only has effect if either the IOTST or PMCTST bit is set. The

DBCTRL bit is used to measure the drive capability of the data bus driver

pads.

IOTST:

The IOTST bit is used to allow normal microprocessor access to the test

registers and control the test mode in each block in the EQUAD for board

level testing. When IOTST is a logic 1, all blocks are held in test mode and

the microprocessor may write to a block's test mode 0 registers to manipulate

the outputs of the block and consequently the device outputs (refer to the

"Test Mode 0 Details" in the "Test Features" section).

HIZIO,HIZDATA:

The HIZIO and HIZDATA bits control the tri-state modes of the EQUAD .

While the HIZIO bit is a logic 1, all output pins of the EQUAD except the data

bus are held in a high-impedance state. The microprocessor interface is still

active. While the HIZDATA bit is a logic 1, the data bus is also held in a high-

impedance state which inhibits microprocessor read cycles.

PM6344 데이터시트(PDF) 96 Page - PMC-Sierra, Inc