PM6344 datasheet(71/256 Pages) PMC

71 / 256 page

STANDARD PRODUCT

PMC-Sierra, Inc.

PM6344 EQUAD

PMC-951013

ISSUE 5

QUADRUPLE E1 FRAMER

ROHM

BRXSMFP

BRXCMFP

Result

Backplane receive signaling multiframe

output:

BRFPO[x] pulses high for 1 BRCLK cycle

(or 1 RCLKO[x] cycle if ELST is by-passed

or RCLKOSEL is set to logic 1) during bit 1

of frame 1 of the 16 frame signaling

multiframe, indicating the signaling

multiframe alignment of the BRPCM[x] data

stream. (Even when signaling multiframing

is disabled, the BRFPO[x] output continues

to indicate the position of bit 1 of every 16th

frame.)

Backplane receive composite multiframe

output:

BRFPO[x] goes high on the falling BRCLK

edge (or RCLKO[x] edge if ELST is by-

passed or RCLKOSEL is set to logic 1)

marking the beginning of bit 1 of frame 1 of

every 16 frame signaling multiframe,

indicating the signaling multiframe

alignment of the BRPCM[x] data stream,

and returns low on the falling BRCLK edge

(or RCLKO[x] edge if ELST is by-passed or

RCLKOSEL is set to logic 1) marking the

end of bit 1 of frame 1 of every 16 frame

CRC multiframe, indicating the CRC

multiframe alignment of the BRPCM[x] data

stream. This mode allows both multiframe

alignments to be decoded externally from

the single BRFPO[x] signal. Note that if the

signaling and CRC multiframe alignments

are coincident, BRFPO[x] will pulse high for

1 BRCLK cycle (or RCLKO[x] cycle if ELST

is by-passed or RCLKOSEL is set to logic 1)

every 16 frames.

Backplane receive overhead output:

BRFPO[x] is high for timeslot 0 and timeslot

16 of each 256-bit frame, indicating the

overhead of the BRPCM[x] data stream.

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