WM8608 datasheet(45/54 Pages) WOLFSON

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WM8608

PP Rev 1.5 March 2004

STANDBY, OUTPUT DISABLE AND RESET MODES

STANDBY

Setting the STDBY register bit selects a low power mode, and immediately configures the output to

produce an output defined in Table 47 (PWMCFG). All trace of the previous input samples is

removed, but all control register settings are preserved.

OUTPUT DISABLE (OPDIS) PIN AND REGISTER (OPDISR)

The OPDIS pin is provided to immediately shutdown the outputs, primarily for their protection. This is

useful for short-circuit or thermal protection. The OPDIS pin can be configured in 2 modes:

•

Synchronous

•

Latched

In synchronous mode if OPDIS is high for longer than 100ns the outputs will be disabled. They will be

enabled again at the end of a processing frame when OPDIS goes low for longer than 100ns.

In latched mode if OPDIS is high for longer than 100ns, the outputs will be disabled and will remain

off until OPDIS is reset via the control interface and the end of a processing frame is reached (Table

50).

The output disable register (OPDISR) also allows the PWM outputs to be disabled via a register

write. If OPDISR is set the PWM outputs will be disabled at the end of the next processing frame and

enabled if OPDISR is reset at the end of the next processing frame.

BIT

LABEL

DEFAULT

DESCRIPTION

STDBY

Standby select:

0 : Normal Mode

1: Standby Mode

OPDISR

Output disable register

0: Normal mode

1: PWM output disabled

R29 (1Dh)

Power Down

MENA

OPDIS Mode

0 : Synchronous

1: Latched, reset via Control I/F

Table 49 Power Down

EXTERNAL APPLICATION POWER-DOWN (EAPDB) PIN

The state of the output pin EAPDB shows whether the device is disabled (i.e. OPDIS input pin active

or STDBY register set).

EAPDB

STATE

DESCRIPTION

The device is operating

correctly

External

Application

Power Down

(default)

The outputs are disabled or

the WM8608 device is in

Standby (default) mode

Table 50 EAPDB Pin

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