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WM8608 데이터시트(PDF) 47 Page - Wolfson Microelectronics plc |
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WM8608 데이터시트(HTML) 47 Page - Wolfson Microelectronics plc |
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47 / 54 page ![]() Product Preview WM8608 w PP Rev 1.5 March 2004 47 REGISTER MAP The complete register map is shown below. The detailed description can be found in the relevant text of the device description. There are 32 registers with 9 bits per register. These can be controlled using the Control Interface. REGISTER ADDRESS REMARKS BIT[8] BIT[7] BIT[6] BIT[5] BIT[4] BIT[3] BIT[2] BIT[1] BIT[0] DEFAULT PAGE REF R0 (00h) 00_0000 Clocking 0 0 0 0 0 CLKDIV2 MEDGE MPEG CMAST 0_0000_0011 21 R1 (01h) 00_0001 Sample Rate 0 0 0 0 SRDET SR 0_0001_0000 21 R2 (02h) 00_0010 Audio IF Format BCLKINV MS LRSWAP SUBSWP LRP WL FORMAT 0_0000_1010 20 R3 (03h) 00_0011 Input/Output Configuration 0 0 0 SUBCFG OPCFG RCCFG IPCFG 0_0001_1001 27 R4 (04h) 00_0100 Front-Left Volume UPDATE VOLFL (Front Left) Volume 0_1011_0001 33 R5 (05h) 00_0101 Front-Right Volume UPDATE VOLFR (Front Right) Volume 0_1011_0001 33 R6 (06h) 00_0110 Surround-Left Volume UPDATE VOLSL (Surround Left) Volume 0_1011_0001 33 R7 (07h) 00_0111 Surround-Right Volume UPDATE VOLSR (Surround Right) Volume 0_1011_0001 34 R8 (08h) 00_1000 Front-Centre Volume UPDATE VOLFC (Front Centre) Volume 0_1011_0001 34 R9 (09h) 00_1001 Rear-Centre Volume UPDATE VOLRC (Rear Centre) Volume 0_1011_0001 34 R10 (0Ah) 00_1010 Subwoofer Volume UPDATE VOLS (Subwoofer) Volume 0_1011_0001 34 R11 (0Bh) 00_1011 Dual Volume Control 0 0 0 0 0 0 DVCC DVCS DVCF 0_0000_0000 35 R12 (0Ch) 00_1100 Mute 0 0 0 0 AMUTESB AMUTEC AMUTES AMUTEF SMUTE 0_0001_1110 37 R13 (0Dh) 00_1101 Bass (1) 0 0 0 0 0 0 LFEBOOST LPHPCO 0_0000_0001 30 R14 (0Eh) 00_1110 Bass (2) 0 0 0 LPENC LPENS LPENF HPENC HPENS HPENF 0_0011_1111 30 R15 (0Fh) 00_1111 EQ Band 1 Gain Control 0 EQ1GFC EQ1GF 0_1111_1111 31 R16 (10h) 01_0000 EQ Band 2 Gain Control 0 EQ2GFC EQ2GF 0_1111_1111 31 R17 (11h) 01_0001 EQ Band 3 Gain Control 0 EQ3GFC EQ3GF 0_1111_1111 31 R18 (12h) 01_0010 EQ Frequency Control 0 0 0 EQ3CFC EQ3CF EQ2CFC EQ2CF EQ1CFC EQ1CF 0_0011_1111 32 R19(13h) 01_0011 Speaker Equaliser 0 0 0 0 0 LSEQ LSCO 0_0000_1000 32 R20 (14h) 01_0100 Deemphasis 0 0 0 0 0 0 0 0 DEEMPH 0_0000_0000 33 R21 (15h) 01_0101 Peak Compressor F, S, C (1) 0 0 0 0 0 0 PLENC PLENS PLENF 0_0000_0111 38 R22 (16h) 01_0110 Peak Compressor F, S, C, (2) FDEP THRESH DCY ATK 0_1101_1010 39 R23 (17h) 01_0111 Peak Compressor SUB (1) 0 0 0 0 0 0 0 0 PLENSUB 0_0000_0001 39 R24 (18h) 01_1000 Peak Compressor SUB (2) FDEP THRESH DCY ATK 0_1101_1010 40 R25 (19h) 01_1001 Zero Cross 0 0 0 0 ZCT ZCSUB ZCC ZCS ZCF 0_0001_1111 41 R26 (1Ah) 01_1010 Output phase 0 0 PH 0_0000_0000 43 R27 (1Bh) 01_1011 PWM Output Config 0 PWMCLK 0 0 0 PWMPH PWMCFG LVDS 0_0000_1000 44 R28 (1Ch) 01_1100 Output Config 0 0 0 0 0 0 0 0 TRI 0_0000_0000 44 R29 (1Dh) 01_1101 Power Down 0 0 0 0 0 0 MENA OPDISR STDBY 0_0000_0101 45 R30 (1Eh) 01_1110 Reset 0 0 0 0 0 0 0 0 RLENA 0_0000_0000 46 R31 (1Fh) 01_1111 PSU 0 0 0 0 DCYPSU CLKPSU ENPSU 0_0000_0000 46 R32 (20h) 10_0000 Synchroniser (1) 0 0 0 HOLD GMAX GMIN SYNCEN 0_0001_0101 24 R33 (21h) 10_0001 Synchroniser (2) 0 0 0 0 0 0 SYNTO 0_0000_0100 24 Table 53 Register Map Description |
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