WM8778SEDSSLASHR datasheet(41/50 Pages) WOLFSON

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WM8778

PP Rev 1.7 June 2004

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

ADCHPD

ADC Highpass Filter Disable:

0: Highpass Filter enabled

1: Highpass Filter disabled

2:0

ADCRATE[2:0]

010

Master Mode ADCMCLK:ADCLRC Ratio Select:

010: 256fs

011: 384fs

100: 512fs

101: 768fs

ADCOSR

ADC Oversample Rate Select:

0: 128x oversampling

1: 64x oversapmling

6:4

DACRATE[2:0]

010

Master Mode DACMCLK:DACLRC Ratio Select:

000: 128fs

001: 192fs

010: 256fs

011: 384fs

100: 512fs

101: 768fs

DACMS

DAC Maser/Slave Interface Mode Select:

0: Slave Mode – DACLRC and DACBCLK are inputs

1: Master Mode –DACLRC and DACBCLK are outputs

R12 (0Ch)

0001100

Master Mode

Control

ADCMS

ADC Maser/Slave Interface Mode Select:

0: Slave Mode – ADCLRC and ADCBCLK are inputs

1: Master Mode – ADCLRC and ADCBCLK are outputs

PDWN

Chip Powerdown Control (works in tandem with ADCPD and

DACPD):

0: All circuits running, outputs are active

1: All circuits in power save mode, outputs muted

ADCPD

ADC Powerdown:

0: ADC enabled

1: ADC disabled

DACPD

DAC Powerdown:

0: DAC enabled

1: DAC disabled

R13 (0Dh)

0001101

PWR Down

Control

AINPD

AINPD Powerdown:

0: ANALOGUE INPUT enabled

1: ANALOGUE INPUT disabled

7:0

LAG[7:0]

11001111

(0dB)

Attenuation Data for Left Channel ADC Gain in 0.5dB Steps:

00000000 : digital mute

00000001 : -103dB

………..

11001111 : 0dB

…………

11111110 : +23.5dB

11111111 : +24dB

R14 (0Eh)

0001110

Attenuation

ADCL

ZCLA

Left ADC Zero Cross Enable:

0: Zero cross disabled

1: Zero cross enabled

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