WM8778SEDSSLASHR datasheet(16/50 Pages) WOLFSON

16 / 50 page

WM8778

Product Preview

PP Rev 1.7 June 2004

Figure 9 Timing Diagram for Power on Sequence

DIGITAL AUDIO INTERFACE

MASTER AND SLAVE MODES

The audio interface operates in either Slave or Master mode, selectable using the MS control bit. In

both Master and Slave modes DIN is always an input to the WM8778 and DOUT is always an output.

The default is Slave mode.

In Slave mode (MS=0) ADCLRC, DACLRC, ADCBCLK and DACBCLK are inputs to the WM8778

(Figure 10). DIN and DACLRC are sampled by the WM8778 on the rising edge of DACBCLK,

ADCLRC is sampled on the rising edge of ADCBCLK. ADC data is output on DOUT and changes on

the falling edge of ADCBCLK. By setting control bit BCLKINV the polarity of ADCBCLK and

DACBCLK may be reversed so that DIN and DACLRC are sampled on the falling edge of DACBCLK,

ADCLRC is sampled on the falling edge of ADCBCLK and DOUT changes on the rising edge of

ADCBCLK.

ADCBCLK

DOUT

ADCLRC

DIN

DACLRC

WM8778

CODEC

DVD

Controller

DACBCLK

Figure 10 Slave Mode

In Master mode (MS=1) ADCLRC, DACLRC, ADCBCLK and DACBCLK are outputs from the

WM8778 (Figure 11). ADCLRC, DACLRC, ADCBCLK and DACBCLK are generated by the WM8778.

DIN is sampled by the WM8778 on the rising edge of DACBCLK so the controller must output DAC

data that changes on the falling edge of DACBCLK. ADC data is output on DOUT and changes on

the falling edge of ADCBCLK. By setting control bit BCLKINV, the polarity of ADCBCLK and

DACBCLK may be reversed so that DIN is sampled on the falling edge of DACBCLK and DOUT

changes on the rising edge of ADCBCLK.

WM8778SEDS/R 데이터시트(PDF) 16 Page - Wolfson Microelectronics plc