STLED524 datasheet(19/72 Pages) STMICROELECTRONICS

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STLED524

Detailed description

To avoid false activation of the short or open ISET pin protection, the minimum value of

RSET should be higher than 14 kΩ and lower than 270 kΩ.

4.4

Patterns

The STLED524 includes the memory for 2 patterns of 5x24 dots. Each dot in a pattern has 2

registers for its setting.

One 8-bit register stores dimming settings. The other one is 4-bit only and stores information

about slope and delay.

where:

n: is a number of pattern

xx: are coordinates of a dot in the matrix xx = {A0, A1, A2, A3, A4, B0, B1, …, B4, C0…, X0,

X1, X2, X3, X4}.

Pattern 1 and pattern 2 memories are not initialized after the reset. They can contain

random data. Their content should be reset by CLR1/CLR2 bits.

4.4.1

Pattern register organization

A pair of 8-bit registers is used to set properties of each dot in the matrix.

Table 11. Dimming, slope and delay registers of one dot

Dimming

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Add = nnh

Dn_xx[7:0]

Default value

Not defined

Slope and delay

(S&D)

Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1

Bit 0

Add = (nn+1)h

PnCYCxx[1:0]

PnDLYxx[1:0]

Default value

Not defined

Table 12. Dimming, slope and delay registers of one dot (memory organization)

Address 0xnnh

Address 0x(nn+1)h

Dimming register

Slope and delay register

Bit 7Bit 6Bit 5

Bit 4Bit 3Bit 2Bit 1

Bit 0Bit 7Bit 6

Bit 5Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Dn_xx[7:0]

PnCYCxx[1:0]

PnDLYxx[1:0]

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