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STLED524 데이터시트(PDF) 29 Page - STMicroelectronics |
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STLED524 데이터시트(HTML) 29 Page - STMicroelectronics |
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29 / 72 page ![]() DocID026217 Rev 1 29/72 STLED524 Detailed description EOSCR bit is set, when the scroll operation is over. An interrupt is generated, if it is enabled. When a short-circuit is detected on any row connections, current mirrors are disabled by setting EN bit to 0 automatically. Boost operation is not touched. An interrupt is generated if it is enabled and ROWSC bit is set in the latch register. 4.5.14 Scroll step register This register is described in Section 4.7.1 4.5.15 Version register The version register contains information about the version of the chip. 4.6 Slope mode operation Figure 6. Slope cycle operation Table 31. Interrupt overview Latch register bit Interrupt generated when set Interrupt generated when reset BSTOK Yes Yes ROWSC Yes No EOSCR Yes No SHORT Yes No OPEN Yes No THP Yes Yes OVP Yes No Table 32. Version register Version Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Add = FFh ---- VER[3:0] Default 0 0 0000 01 GIPGLM2103140944LM |
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