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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ST72325AR7-Auto 데이터시트(PDF) 53 Page - STMicroelectronics |
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ST72325AR7-Auto 데이터시트(HTML) 53 Page - STMicroelectronics |
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53 / 243 page  Obsolete Product(s) - Obsolete Product(s) ST72325xxx-Auto Supply, reset and clock management Doc ID 13770 Rev 3 53/243 Application notes The LVDRF flag is not cleared when another RESET type occurs (external or watchdog); the LVDRF flag remains set to keep trace of the original failure. In this case, software can detect a watchdog reset but cannot detect an external reset. Caution: When the LVD is not activated with the associated option byte, the WDGRF flag cannot be used in the application. 0 WDGRF Watchdog reset flag This bit indicates that the last Reset was generated by the Watchdog peripheral. It is set by hardware (watchdog reset) and cleared by software (writing zero) or an LVD Reset (to ensure a stable cleared state of the WDGRF flag when CPU starts). Combined with the LVDRF flag information, the flag description is given in Table 15. Table 15. Reset source flags Reset sources LVDRF WDGRF External RESET pin 0 0 Watchdog 0 1 LVD 1 X Table 14. SICSR description (continued) Bit Name Function |
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