ST72325AR7-Auto datasheet(240/243 Pages) STMICROELECTRONICS

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ST72325xxx-Auto

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Doc ID 13770 Rev 3

The symptom does not occur when the interrupts are handled normally, that is, when:

●

The interrupt flag is cleared within its own interrupt routine

●

The interrupt flag is cleared within any interrupt routine with higher or identical priority

level

●

The interrupt flag is cleared in any part of the code while this interrupt is disabled

If these conditions are not met, the symptom can be avoided by implementing the following

sequence:

PUSH CC

SIM

Reset interrupt flag

POP CC

22.1.4

SCI wrong break duration

Description

A single break character is sent by setting and resetting the SBK bit in the SCICR2 register.

In some cases, the break character may have a longer duration than expected:

●

20 bits instead of 10 bits if M = 0

●

22 bits instead of 11 bits if M = 1

In the same way, as long as the SBK bit is set, break characters are sent to the TDO pin.

This may lead to generating one break more than expected.

Occurrence

The occurrence of the problem is random and proportional to the baud rate. With a transmit

frequency of 19200 baud (fCPU = 8 MHz and SCIBRR = 0xC9), the wrong break duration

occurrence is around 1%.

Workaround

If this wrong duration is not compliant with the communication protocol in the application,

software can request that an Idle line be generated before the break character. In this case,

the break duration is always correct assuming the application is not doing anything between

the idle and the break. This can be ensured by temporarily disabling interrupts.

The exact sequence is:

●

Disable interrupts

●

Reset and Set TE (IDLE request)

●

Set and Reset SBK (Break Request)

●

Re-enable interrupts

22.1.5

16-bit timer PWM mode

In PWM mode, the first PWM pulse is missed after writing the value FFFCh in the OC1R

the OLVL1 and OLVL2 settings.

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