| 전자부품 데이터시트 검색엔진 |
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XRT75VL00D 데이터시트(PDF) 22 Page - Exar Corporation |
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XRT75VL00D 데이터시트(HTML) 22 Page - Exar Corporation |
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22 / 92 page ![]() XRT75VL00D E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER REV. 1.0.3 17 FIGURE 5. RECEIVER DATA OUTPUT AND CODE VIOLATION TIMING SYMBOL PARAMETER MIN TYP MAX UNITS RxClk Duty Cycle E3 DS3 STS-1 45 50 34.368 44.736 51.84 55 % MHz MHz MHz tRRX RxClk rise time (10% o 90%) 2 4 ns tFRX RxClk falling time (10% to 90%) 2 4 ns tCO RxClk to RPOS/RNEG delay time 4 ns tLCVO RxClk to rising edge of LCV output delay 2.5 ns FIGURE 6. TRANSMIT PULSE AMPLITUDE TEST CIRCUIT FOR E3, DS3 AND STS-1 RATES RClk t RRX t FRX RPOS or RNEG LCV t LCVO t CO TTIP TRing 1:1 R3 75 Ω TxPOS TxNEG TxLineClk TPData TNData TxClk Rext 31.6 Ω + 1% 31.6 Ω +1% R1 R2 RefAGND |
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