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XRT75VL00D 데이터시트(PDF) 9 Page - Exar Corporation |
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XRT75VL00D 데이터시트(HTML) 9 Page - Exar Corporation |
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9 / 92 page ![]() XRT75VL00D REV. 1.0.3 E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER 4 PIN DESCRIPTIONS (BY FUNCTION) TRANSMIT INTERFACE PIN #SIGNAL NAME TYPE DESCRIPTION 4TxON I Transmitter ON Input Setting this input pin "High" turns on the Transmitter. NOTES: 1. Even when the XRT75VL00D is configured in HOST mode, this pin still controls the TTIP and TRING outputs 2. When the Transmitter is turned off either in Host or Hardware mode,the TTIP and TRING outputs are Tri-stated. 3. This pin is internally pulled down 46 TxClk I Transmit Clock Input for TPData and TNData The frequency accuracy of this input clock must be of nominal bit rate ± 20 ppm. The duty cycle can be 30%-70%. The XRT75VL00D samples the TPData and TNData pins on the falling or rising edge of TxClk signal based on the status of TxClkINV pin (in Hardware mode) or the status of the bit in the Channel Register (in HOST mode). 26 TxClkINV/ SClk I Transmit Clock Invert or Serial Clock Input: Function of this depends on whether the XRT75VL00D is configured to operate in Hardware mode or Host mode. In Hardware mode, setting this input pin “High” configures the Transmitter to sample the TPData and TNData data on the rising edge of the TxClk. NOTE: If the XRT75VL00D is configured in HOST mode, this pin functions as SClk input pin (please refer to the pin description for Microprocessor interface). 48 TNData I Transmit Negative Data Input If the XRT75VL00D is configured in Dual-rail mode, this pin is sampled on the falling or rising edge of TxClk based on the status of the TClkINV pin (in Hard- ware mode) or the status of the control bit in the Channel Register (in HOST mode). NOTES: 1. This input pin is ignored and should be tied to GND if the Transmitter Section is configured to accept Single-Rail data from the Terminal Equipment. 47 TPData I Transmit Positive Data Input The XRT75VL00D samples this pin on the falling or rising edge of TxClk based on the status of the TClkINV pin (in Hardware mode) or the status of the control bit in the Channel Register (in HOST mode). 50 TTIP O Transmit TTIP Output The XRT75VL00D uses this pin along with TRING to transmit a bipolar signal to the line using a 1:1 transformer. |
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