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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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XRT75VL00D 데이터시트(PDF) 71 Page - Exar Corporation |
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XRT75VL00D 데이터시트(HTML) 71 Page - Exar Corporation |
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71 / 92 page  XRT75VL00D REV. 1.0.3 E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER 66 Figure 46 presents an illustration of the bit format within the 16-bit word (consisting of the H1 and H2 bytes) with the "D" bits designated. NOTE: At this time the "D" bits are inverted in order to denote that a "decrementing" pointer adjustment event is currently occurring. During the STS-1 frame that follows the "Negative Byte-Stuffing" Event The "D" bits (within the pointer-word) will be set back to their normal value; and the contents of the H1 and H2 bytes will be decremented by one. FIGURE 46. AN ILLUSTRATION OF THE BIT-FORMAT WITHIN THE 16-BIT WORD (CONSISTING OF THE H1 AND H2 BYTES ) WITH THE "D" BITS DESIGNATED D I D I D I D I D I S S N N N N LSB MSB H2 Byte H1 Byte 10 Bit Pointer Expression |
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