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STM8S 데이터시트(PDF) 460 Page - STMicroelectronics |
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STM8S 데이터시트(HTML) 460 Page - STMicroelectronics |
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460 / 467 page ![]() Revision history RM0016 460/467 DocID14587 Rev 14 31-Jan-2011 7 cont’d – Removed Halt mode and HALT instruction from Section 6.4: Activation level/low power mode control. Section 11: General purpose I/O ports (GPIO): – Added note Figure 24: GPIO block diagram. – Removed warning note in Section 11.3: Port configuration and usage. – Updated Table 21: I/O port configuration summary. – Updated Section 11.4: Reset configuration. – Updated unused I/O pin status in Section 11.5: Unused I/O pins – Added TLI masking in Section 11.7.2: Interrupt capability. – Updated Section 11.7.3: Analog channels. – Updated Section 11.8.2: Slope control. – Changed reset value of Px_IDR to 0xXX in Section 11.9.2: Port x pin input register (Px_IDR). – Specified PD_CR1 reset value in Section 11.9.4: Port x control register 1 (Px_CR1). Section 12: Auto-wakeup (AWU): – Modified Step 5 in Section 12.3.1: AWU operation. Section 17: 16-bit advanced control timer (TIM1): – Modified Figure 71: Center-aligned PWM waveforms (ARR = 8) – Changed fSYSCLK to fMASTER in Figure 31: TIM1 general block diagram. – TIM1_TRIG renamed TIM1_ETR. Section 20: Serial peripheral interface (SPI): – Added note related to parallel multislave structures in Section 20.3.2: Configuring the SPI in slave mode. Section 21: Inter-integrated circuit (I2C) interface: – Modified Figure 101: I2C block diagram on page 290, Figure 102: Transfer sequence diagram for slave transmitter and Figure 103: Transfer sequence diagram for slave receiver. – Modified Section 21.4.2: I2C master mode. – Modified PO bit description changed in Section 21.7.2: Control register 2 (I2C_CR2). – Modified note 8 in Section 21.7.7: Status register 1 (I2C_SR1), Section 21.7.11: Clock control register low (I2C_CCRL) and Section 21.7.12: Clock control register high (I2C_CCRH). – Added Table 50: I2C_CCR values for SCL frequency table (fMASTER = 10 MHz or 16 MHz). Section 22: Universal asynchronous receiver transmitter (UART): – Updated LIN break and delimiter detection. – Updated Table 54: Baud rate programming and error calculation. – Updated interrupt source flags and slave mode features updated in Section 22.2. Table 79. Document revision history (continued) Date Revision Changes |
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