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IS25LP064A-RGLA1 데이터시트(PDF) 32 Page - Integrated Silicon Solution, Inc

부품명 IS25LP064A-RGLA1
상세설명  3V SERIAL FLASH MEMORY WITH 133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE
PDF  99 Pages
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제조업체  ISSI [Integrated Silicon Solution, Inc]
홈페이지  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25LP064A-RGLA1 데이터시트(HTML) 32 Page - Integrated Silicon Solution, Inc

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IS25LP064A/032A
Integrated Silicon Solution, Inc.- www.issi.com
32
Rev. A
11/06/2015
8.6 FAST READ QUAD OUTPUT OPERATION (FRQO, 6Bh)
The FRQO instruction is used to read memory data on four output pins each at up to a 133 MHz clock.
The FRQO instruction code is followed by three address bytes (A23
– A0) and a dummy byte (8 clocks),
transmitted via the IO0 line, with each bit latched-in during the rising edge of SCK. Then the first data byte
addressed is shifted out on the IO3, IO2, IO1 and IO0 lines, with each group of four bits shifted out at a
maximum frequency fCT, during the falling edge of SCK. The first bit (MSB) is output on IO3, while
simultaneously the second bit is output on IO2, the third bit is output on IO1, etc.
The first byte addressed can be at any memory location. The address is automatically incremented after each
byte of data is shifted out. When the highest address is reached, the address counter will roll over to the
000000h address, allowing the entire memory to be read with a single FRQO instruction. FRQO instruction is
terminated by driving CE# high (VIH).
If a FRQO instruction is issued while an Erase, Program or Write cycle is in process (BUSY=1) the instruction
is ignored and will not have any effects on the current cycle.



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