IS25LP064A-RGLA1 datasheet(73/99 Pages) ISSI

부품명	IS25LP064A-RGLA1

상세설명	3V SERIAL FLASH MEMORY WITH 133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE

PDF	99 Pages

Scroll/Zoom	100%

제조업체	ISSI [Integrated Silicon Solution, Inc]

홈페이지	http://www.issi.com

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73 / 99 page

IS25LP064A/032A

Integrated Silicon Solution, Inc.- www.issi.com

Rev. A

11/06/2015

Figure 8.57 FRDDTR Sequence (with command decode cycles)

CE #

SCK

Instruction = BDh

CE #

SCK

3-byte Address

High Impedance

...

Mode 3

Mode 0

22 20 18

7 5 3 1 7

5 3

1 7 5 3 1 7 5 3

1 7 5 3 1 7 5 3 1

2 Dummy Cycles

23 21 19

Data Out

6 4 2 0 6

4 2

0 6 4 2 0 6 4 2

0 6 4 2 0 6 4 2 0

Data Out

16 14 12

17 15 13

7 5

6 4

3 1

2 0

Mode Bits

...

Notes:

1. If the mode bits=AXh (

where X is don’t care), it can execute the AX read mode (without command). When the

mode bits are different from AXh, the device exits the AX read operation.

2. Number of dummy cycles depends on clock speed. Detailed information in Table 6.10 Read Dummy Cycles.

3. Since the number of dummy cycles and AX bit cycles are same in the above Figure, X should be Hi-Z to avoid I/O

contention.

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