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IS25LP064A-RGLA1 데이터시트(PDF) 35 Page - Integrated Silicon Solution, Inc

부품명 IS25LP064A-RGLA1
상세설명  3V SERIAL FLASH MEMORY WITH 133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE
PDF  99 Pages
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제조업체  ISSI [Integrated Silicon Solution, Inc]
홈페이지  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25LP064A-RGLA1 데이터시트(HTML) 35 Page - Integrated Silicon Solution, Inc

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IS25LP064A/032A
Integrated Silicon Solution, Inc.- www.issi.com
35
Rev. A
11/06/2015
Figure 8.8 Fast Read Quad I/O Sequence (with command decode cycles)
CE #
SCK
5
1
Data Out 1
Instruction = EBh
20
CE #
SCK
4
0
4
0
3-byte Address
High Impedance
16
12
8
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Mode 3
Mode 0
...
tV
IO0
IO1
4
0
5
1
5
1
4
0
4
0
5
1
4
0
IO0
IO1
21
5
1
5
1
17
13
9
22
6
2
6
2
18
14
10
23
7
3
7
3
19
15
11
Mode Bits
IO2
IO3
6
2
6
2
6
2
6
2
7
3
7
3
7
3
7
3
Data Out 2 Data Out 3 Data Out 4
IO2
IO3
1
0
5
1
...
4
0
...
2
6
2
...
3
7
3
...
5
4
6
7
6 Dummy Cycles
Data Out 5 Data Out 6
Notes:
1. If the mode bits=AXh (
where X is don’t care), it can execute the AX read mode (without command). When the
mode bits are different from AXh, the device exits the AX read operation.
2. Number of dummy cycles depends on clock speed. Detailed information in Table 6.10 Read Dummy Cycles.



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