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K32L2AX 데이터시트(PDF) 22 Page - NXP Semiconductors

부품명 K32L2AX
상세설명  K32 L2A Microcontroller with 512 KB Flash and 128 KB SRAM
PDF  96 Pages
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제조업체  NXP [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo NXP - NXP Semiconductors

K32L2AX 데이터시트(HTML) 22 Page - NXP Semiconductors

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2.2.12 The Low Power Periodic Interrupt Timer (LPIT)
LPIT is a multi-channel timer module generating independent pre-trigger and trigger
outputs. These timer channels can operate individually or can be chained together. The
LPIT can operate in low power modes if configured to do so. The pre-trigger and
trigger outputs can be used to trigger other modules on the device.
The LPIT generates periodic trigger events to the DMA channel mux. The LPIT to the
DMAMUX trigger is configured in the TRGMUX.
2.2.13 Low Power Serial Peripheral Interface (LPSPI)
The LPSPI is a low power Serial Peripheral Interface (SPI) module that supports an
efficient interface to an SPI bus as a master and/or a slave. The LPSPI can continue
operating in stop modes provided an appropriate clock is available and is designed for
low CPU overhead with DMA offloading of FIFO register accesses.
The LPSPI supports the following features:
• Word size = 32 bits
• Command/transmit FIFO of 4 words.
• Receive FIFO of 4 words.
• Host request input can be used to control the start time of an SPI bus transfer.
2.2.14 Low-Power Timer (LPTMR)
The low-power timer (LPTMR) can be configured to operate as a time counter with
optional prescaler, or as a pulse counter with optional glitch filter, across all power
modes, including the low-leakage modes. It can also continue operating through most
system reset events, allowing it to be used as a time of day counter.
This device has two low-power timers: LPTMR0 and LPTMR1. Both allow operation
during all power modes. LPTMR0 is accessed via AIPS0. LPTMR1 is accessed via
AIPS1.
2.2.15 Low Power Universal Asynchronous Receiver/Transmitter
(LPUART)
The LPUART modules support the basic UART with DMA interface function and x4 to
x32 oversampling of baud-rate. This module supports LIN slave operation.
Overview
22
K32 L2A Microcontroller with 512 KB Flash and 128 KB SRAM, Rev. 3, 02/2021
NXP Semiconductors



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