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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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IMX6SDLCEC 데이터시트(PDF) 33 Page - NXP Semiconductors |
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IMX6SDLCEC 데이터시트(HTML) 33 Page - NXP Semiconductors |
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33 / 169 page  Electrical Characteristics i.MX 6Solo/6DualLite Applications Processors for Consumer Products, Rev. 9, 11/2018 NXP Semiconductors 33 4.1.9 HDMI Power Consumption Table 14 provides HDMI PHY currents for both Active 3D Tx with LFSR15 data and power-down modes. 4.2 Power Supplies Requirements and Restrictions The system design must comply with power-up sequence, power-down sequence, and steady state guidelines as described in this section to guarantee the reliable operation of the device. Any deviation from these sequences may result in the following situations: • Excessive current during power-up phase • Prevention of the device from booting • Irreversible damage to the processor (worst-case scenario) 4.2.1 Power-Up Sequence The restrictions that follow must be observed: • VDD_SNVS_IN supply must be turned on before any other power supply or be connected (shorted) with VDD_HIGH_IN supply. • If a coin cell is used to power VDD_SNVS_IN, then ensure that it is connected before any other supply is switched on. • The SRC_POR_B signal controls the processor POR and must be immediately asserted at power-up and remain asserted until the VDD_ARM_CAP, VDD_SOC_CAP, and VDD_PU_CAP supplies are stable. VDD_ARM_IN and VDD_SOC_IN may be applied in either order with no restrictions. Table 14. HDMI PHY Current Drain Mode Test Conditions Supply Max Current Unit Active Bit rate 251.75 Mbps HDMI_VPH 14 mA HDMI_VP 4.1 mA Bit rate 279.27 Mbps HDMI_VPH 14 mA HDMI_VP 4.2 mA Bit rate 742.5 Mbps HDMI_VPH 17 mA HDMI_VP 7.5 mA Bit rate 1.485 Gbps HDMI_VPH 17 mA HDMI_VP 12 mA Bit rate 2.275 Gbps HDMI_VPH 16 mA HDMI_VP 17 mA Bit rate 2.97 Gbps HDMI_VPH 19 mA HDMI_VP 22 mA Power-down — HDMI_VPH 49 μA HDMI_VP 1100 μA |
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