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IMX6SDLCEC 데이터시트(PDF) 64 Page - NXP Semiconductors |
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IMX6SDLCEC 데이터시트(HTML) 64 Page - NXP Semiconductors |
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64 / 169 page ![]() i.MX 6Solo/6DualLite Applications Processors for Consumer Products, Rev. 9, 11/2018 64 NXP Semiconductors Electrical Characteristics 4.10 General-Purpose Media Interface (GPMI) Timing The i.MX 6Solo/6DualLite GPMI controller is a flexible interface NAND Flash controller with 8-bit data width, up to 200 MB/s I/O speed and individual chip select. It supports Asynchronous timing mode, Source Synchronous timing mode and Samsung Toggle timing mode separately described in the following subsections. 4.10.1 Asynchronous Mode AC Timing (ONFI 1.0 Compatible) Asynchronous mode AC timings are provided as multiplications of the clock cycle and fixed delay. The maximum I/O speed of GPMI in asynchronous mode is about 50 MB/s. Figure 25 through Figure 28 depicts the relative timing between GPMI signals at the module level for different operations under asynchronous mode. Table 46 describes the timing parameters (NF1–NF17) that are shown in the figures. Figure 25. Command Latch Cycle Timing Diagram Table 45. i.MX 6DualLite Supported DDR3/DDR3L/LPDDR2 Configurations Parameter LPDDR2 (Dual channel) LPDDR2 (Single channel) DDR3 DDR3L Clock frequency 400 MHz 400 MHz 400 MHz 400 MHz Bus width 32-bit per channel 16/32-bit 16/32/64-bit 16/32/64-bit Channel Dual Single Single Single Chip selects 2 per channel 2 2 2 Command NF8 NF9 NF7 NF6 NF5 NF2 NF1 NF3 NF4 |
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