HCS08 datasheet(70/316 Pages) NXP

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Chapter 5 Resets, Interrupts, and General System Control

MC9S08SG8 MCU Series Data Sheet, Rev. 8

Freescale Semiconductor

5.7.3

System Options Register 1 (SOPT1)

This high page register is a write-once register so only the first write after reset is honored. It can be read

at any time. Any subsequent attempt to write to SOPT1 (intentionally or unintentionally) is ignored to

avoid accidental changes to these sensitive settings. SOPT1 should be written during the user’s reset

initialization program to set the desired controls even if the desired settings are the same as the reset

settings.

1 NOTE: Bit 4 is reserved. Writes change the value, but have no effect on this MCU.

321

COPT

STOPE

IICPS

Reset:

110

000

= Unimplemented or Reserved

Figure 5-4. System Options Register 1 (SOPT1)

Table 5-5. SOPT1 Register Field Descriptions

Field

Description

7:6

COPT[1:0]

COP Watchdog Timeout — These write-once bits select the timeout period of the COP. COPT along with

COPCLKS in SOPT2 defines the COP timeout period. See Table 5-1.

STOPE

Stop Mode Enable — This write-once bit is used to enable stop mode. If stop mode is disabled and a user

program attempts to execute a STOP instruction, an illegal opcode reset is forced.

0 Stop mode disabled.

1 Stop mode enabled.

IICPS

IIC Pin Select — This bit selects the location of the SDA and SCL pins of the IIC module.

0 SDA on PTA2, SCL on PTA3.

1 SDA on PTB6, SCL on PTB7.

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