HCS08 datasheet(83/316 Pages) NXP

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Chapter 6 Parallel Input/Output Control

MC9S08SG8 MCU Series Data Sheet, Rev. 8

Freescale Semiconductor

6.6.1.7

Port A Interrupt Pin Select Register (PTAPS)

6.6.1.8

Port A Interrupt Edge Select Register (PTAES)

321

000

PTAPS3

PTAPS2

PTAPS1

PTAPS0

Reset:

000

Figure 6-9. Port A Interrupt Pin Select Register (PTAPS)

Table 6-8. PTAPS Register Field Descriptions

Field

Description

3:0

PTAPS[3:0]

Port A Interrupt Pin Selects — Each of the PTAPSn bits enable the corresponding port A interrupt pin.

0 Pin not enabled as interrupt.

1 Pin enabled as interrupt.

321

000

PTAES3

PTAES2

PTAES1

PTAES0

Reset:

000

Figure 6-10. Port A Edge Select Register (PTAES)

Table 6-9. PTAES Register Field Descriptions

Field

Description

3:0

PTAES[3:0]

Port A Edge Selects — Each of the PTAESn bits serves a dual purpose by selecting the polarity of the active

interrupt edge as well as selecting a pull-up or pull-down device if enabled.

0 A pull-up device is connected to the associated pin and detects falling edge/low level for interrupt generation.

1 A pull-down device is connected to the associated pin and detects rising edge/high level for interrupt

generation.

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