EM62100AGH datasheet(15/60 Pages) EMC

15 / 60 page

EM62100

65 COM/132 SEG STN LCD Driver

Product Specification (V1.1) 09.13.2005

•••• 9

(This specification is subject to change without further notice)

Pin Name

I/O

Function

No.ofPins

M/S = “H”: Master operation

M/S = “L”: Slave operation

The following is true depending on the M/S and CKS status:

M/S CKS

Oscillator

Circuit

PowerSupply

Circuit

FLM

DOFB

Enable

Disable

Enable

Disable

M/S

O: Output, I: Input

I/O

Display clock input terminal

When the EM62100 chips are used in master/slave mode, the

various CK terminals must be connected.

I/O

Liquid crystal alternating current signal I/O terminal.

M/S = “H”: Output, M/S = “L”: Input

When the EM62100 Series chip is used in master/slave mode, the

various M terminals must be connected.

DOFB

I/O

LCD blanking control terminal

M/S = “H”: Output, M/S = “L”: Input

When the EM62100 chip is used in master/slave mode, the

various DOFB terminals must be connected.

FLM

Output terminal for the static drive

This terminal is only enabled when the static indicator display is

ON during master mode operation, and is used in connection with

the M terminal.

IRS

This terminal selects the resistors for the V0 voltage level

adjustment.

IRS = “H”: Use the internal resistors

IRS = “L”: Do not use the internal resistors. The V0 voltage level

is regulated by an external resistive voltage divider attached to

the VREF terminal.

This pin is enabled only when master mode operation is selected.

It is fixed to either “H” or “L” when slave mode operation is

selected.

HPMB

Power control terminal for the power supply circuit for liquid

crystal drive.

HPMB = “H”: Normal mode, HPMB = “L”: High power mode

This pin is enabled only when master mode operation is selected.

It is fixed to either “H” or “L” when slave mode operation is

selected.

Liquid crystal segment drive outputs. Through a combination of

the contents of the display RAM and with the M signal, a single

level is selected from V0, V2, V3, and VSS.

RAM DATA

Output Voltage

Normal Display Reverse Display

VSS

Power Save & Display OFF

VSS

SEG0

SEG131

132

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