MPC821 datasheet(79/242 Pages) NXP

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MPC8XXFADS Design Specification—Rev 0.1

PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE

PdaHardResetEnNODE istype 'com';

" enables hard reset buffer.

PdaSoftResetEnNODE istype 'com';

" enables soft reset buffer.

"******************************************************************************

"* Tx Shift Register

"******************************************************************************

TxReg7,

TxReg6,

TxReg5,

TxReg4,

TxReg3,

TxReg2,

TxReg1,

TxReg0NODE istype 'reg, buffer'; " Transmit latch and

" shift register

"******************************************************************************

"* Tx Control Logic

"******************************************************************************

TxWordLen3,

TxWordLen2,

TxWordLen1,

TxWordLen0NODE istype 'reg, buffer'; " Counter, counts (on fast clock,

" to gain 1/2 clock resolution)

" transmission length

TxWordEndNODE istype 'com'; " Terminal count, sets transmission

" length.

TxEn NODE istype 'reg, buffer'; " Transmit Enable.

TxClkSnsNODE istype 'reg, buffer'; " transmit clock polarity

"******************************************************************************

"* Rx Shift Register

"******************************************************************************

RxReg0NODE istype 'reg, buffer'; " receive shift register

" and latch

"******************************************************************************

"* Rx Control Logic

"******************************************************************************

DsdiEnNODE istype 'reg';

" enables dsdi towards

"******************************************************************************

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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