| 전자부품 데이터시트 검색엔진 |
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MPC821 데이터시트(PDF) 91 Page - NXP Semiconductors |
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MPC821 데이터시트(HTML) 91 Page - NXP Semiconductors |
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91 / 242 page ![]() Support Information MPC8XXFADS Design Specification—Rev 0.1 PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE else TX_DISABLED; state TX_ENABLED: if(TxWordEnd # PdaRst.fb) then TX_DISABLED else TX_ENABLED; "****************************************************************************** "* Transmit Length Counter. This counter determines the length of transmission "* towards the MPC. The fast clock is used here to allow 1/2 clock resolution "* with the negation of TxEn, which enables DSCK outside. "****************************************************************************** equations TxWordLen.ar = Reset; TxWordLen.clk = IClk; TxWordEnd = (TxWordLen.fb == TX_WORD_LENGTH); when ( STATE_TX_ENABLED & !TxWordEnd & !PdaRst.fb) then TxWordLen.d = TxWordLen.fb + 1; else TxWordLen.d = 0; "****************************************************************************** "* TxClkSns - Transmit Clock Sense. "* Since Host req is synced acc to IClk and may be detected active when Clk2 is "* either '1' or '0', DSCK and the clock according to which DSDI is sent and "* DSDO is sampled should be changed. "* When TxClkSns is '0' - DSCK will be !Clk2 while transmit will be done "* according to Clk2 and recieve by !Clk2. "* When TxClkSns is '1' - DSCK will be Clk2 while transmit will be done "* according to !Clk2~ and recieve by Clk2. "****************************************************************************** equations TxClkSns.clk = IClk; TxClkSns.ar = Reset; state_diagram TxClkSns state TX_ON_RISING: if (HOST_WRITE_ADI_DATA & BndTmrExp.fb & Clk2) then Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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