MPC821 datasheet(144/242 Pages) NXP

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MPC8XXFADS Design Specification—Rev 0.1

PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE

"******************************************************************************

"* Reset & Interrupt Logic Pins.

"******************************************************************************

RstDeb1NODE istype 'com';

" reset push button debouncer

AbrDeb1NODE istype 'com';

" abort push button debouncer

HardResetEnNODE istype 'com';

" enables T.S. hard reset pin

SoftResetEnNODE istype 'com';

" enables T.S. soft reset pin

ConfigHold2,

ConfigHold1,

ConfigHold0node istype 'reg,buffer';" supplies data hold time for

" hard reset configuration

ConfigHoldEndnode istype 'com';

"******************************************************************************

"* data buffers enable.

"******************************************************************************

SyncHardReset~NODE istype 'reg,buffer';

" synchronized hard reset

DSyncHardReset~

NODE istype 'reg,buffer';" double synchronized hard reset

SyncTEA~NODE istype 'reg,buffer';

" needed since TEA~ is O.D.

HoldOffConsidered NODE istype 'reg,buffer';" data drive hold-off state

" machine.

D_FlashOe~NODE istype 'com';

" delayed flash output enable

DD_FlashOe~NODE istype 'com';" double delayed flash output

" enable

TD_FlashOe~NODE istype 'com';" triple delayed flash output

" enable

" QD_FlashOe~NODE istype 'com';

quad delayed

" PD_FlashOe~NODE istype 'com';

penta delayed

KeepPinsConnected node istype 'com';

"******************************************************************************

#####

"* #

####

#####

"* #

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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