 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
AD8335 데이터시트(PDF) 4 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD8335 데이터시트(HTML) 4 Page - Analog Devices |
|
|
4 / 24 page  AD8335 Rev. 0 | Page 4 of 24 Parameter Conditions Min Typ Max Unit Two-Tone IMD3 Distortion VOUT = 1 V p-p, VGN = 3 V f1 = 1 MHz, f2 = 1.05 MHz −69 dBc f1 = 10 MHz, f2 = 10.05 MHz −65 dBc Output IP3 (OIP3) VOUT = 1 V p-p, VGN = 3 V f = 1 MHz 33 dBm f = 10 MHz 31 dBm Channel-to-Channel Crosstalk VOUT = 1 V p-p, f = 1 to 10 MHz −80 dBc Overload Recovery Pra or VGA 10 ns Group Delay Variation Full gain range, f = 1 MHz to 10 MHz 3.0 ns GAIN CONTROL INTERFACE Pins VGNx Normal Operating Range 0 3 V Maximum Range No gain foldover 0 VS V Gain Range LO gain mode; (Pins HLxx = 0 V) −10 to +38 dB HI gain mode; (Pins HLxx = VS) −2 to +46 dB Scale Factor Nominal (Pins SL12 and SL34 = 2.5 V) 19.0 20.0 21.0 dB/V Bias Current −0.3 µA Response Bandwidth 5 MHz Response Time 48 dB gain change 350 ns GAIN ACCURACY Pins VGNx Absolute Gain Error 0 ≤ VGN ≤ 0.4 V 1.25 7.5 dB 0.4 ≤ VGN ≤ 2.6 V, 1 σ −1.25 ±0.2 +1.25 dB 2.6 ≤ VGN ≤ 3 V −7.5 −1.25 dB Gain Law Conformance Over Temperature 0.4 ≤ VGN ≤ 2.6 V; −40°C < TA < +85°C ±0.75 dB Intercept LO gain mode; PrA matched to 50 Ω −16.1 dB HI gain mode; PrA matched to 50 Ω −8.1 dB Channel-to-Channel Matching 0.4 ≤ VGN ≤ 2.6 V 0.15 dB LOGIC LEVEL—HILO, SHUTDOWN PREAMP, and ENABLE INTERFACES Pins HLxx, SPxx, and ENxx Logic Level High 2.75 5 V Logic Level Low 0 1 V BIAS CURRENT—HILO, ENABLE Logic high 80 µA Logic low −12 µA INPUT RESISTANCE—HILO, ENABLE 50 kΩ BIAS CURRENT – SHUTDOWN PREAMP Logic high 20 µA Logic low 0 µA INPUT RESISTANCE—SHUTDOWN PREAMP 500 kΩ HILO Response Time 0.6 µs Enable Response Time 100 µs POWER SUPPLY Pins VPPx and VPVx Supply Voltage 4.5 5 5.5 V Quiescent Current Per channel—PrA and VGA enabled 19 mA Over Temperature −40°C < TA < +85°C 16 22.8 mA Quiescent Power Per channel—PrA and VGA enabled 95 mW Quiescent Current Per channel—PrA disabled, VGA enabled 13 mA Quiescent Power Per channel—PrA disabled, VGA enabled 65 mW Quiescent Current All channels enabled 76 mA Disable Current All channels disabled 0.8 mA PSRR VGN = 0 V, all bypass capacitors removed, 1 MHz −60 dB |
|
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
