UPD17062 datasheet(61/298 Pages) RENESAS

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µPD17062

Table 8-2

Modification of Data Memory Address by Index Register and

Data Memory Row Address Pointer

; Data memory address

BANK ; Bank register

(M)

; Contents of data memory address

(BANK) ; Contents of bank register

; Data memory address excluding banks

; Index register

; Data memory row address

(IX)

; Contents of index register

; General-purpose register address

IXH

; Bits b10-b8 of index register

(R)

; Contents of general-purpose register address

IXM ; Bits b7-b4 of index register

; General-purpose register column address

IXL

; Bits b3-b0 of index register

; General-purpose register pointer

; Data memory row address pointer

(RP)

; Contents of general-purpose register address

(MP)

; Contents of data memory row address pointer

b3 b2 b1 b0 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b2 b1 b0 b3 b2 b1 b0

IXE

MPE

(RP)

(BANK)

(R)

(MP)

(R)

BANK

(BANK)

(MP)

(R)

Logical OR

(IXH)

(R)

Logical

(IX)

ADD

ADDC

SUB

SUBC

AND

XOR

SKE

SKGE

SKLT

SKNE

SKT

SKF

MOV

m, #n4

m, #n

m, #n4

@ r

General-purpose register address specified by r

Data memory address specified by m

Indirect transfer address specified by @r

Row

address

Column

address

Bank

Row

address

Column

address

Bank

Row

address

Column

address

Bank

Address-modified instructions

Same as

above

Same as

above

Same as

above

Same as

above

Same as

above

Indirect transfer address

(IXM)

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