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UPD17062 데이터시트(PDF) 79 Page - Renesas Technology Corp

부품명 UPD17062
상세설명  MOS INTEGRATED CIRCUIT
PDF  298 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

UPD17062 데이터시트(HTML) 79 Page - Renesas Technology Corp

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77
µPD17062
b3
b2
b1
b0
BTM0ZX
BTM0CK2
BTM0CK0
09H
BTM0CK1
0
1
0
0
0
0
0
1
01
0
01
1
10
0
10
1
11
0
11
1
TIMER INT
TIMER CARRY
5 ms
100 ms
20 ms
20 ms
5 ms
5/fTMR s
5 ms
6/fTMR s
100 ms
5 ms
100 ms
5 ms
5/fTMR s
5 ms
6/fTMR s
5 ms
Time base setting
Internal
Internal
Internal
Internal
Internal
External
Internal
External
Internal
Internal
Internal
Internal
External
Internal
External
Internal
Zerocross setting
Zerocross off
Zerocross on
9.5
BTM0MD (09H)
9.6
INTVSYN (0FH, b2)
The INTVSYN flag is used for reading the vertical synchronous signal level. When a high level signal is
input to the VSYNC pin, the flag is set to 1. When a low level signal is input to the VSYNC pin , the flag is reset
to 0.



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