UPD17062 datasheet(66/298 Pages) RENESAS

66 / 298 page

µPD17062

8.5.5

For MPE = 0 and IXE = 1 (Index Modification)

As shown in Table 8-2, when a data memory manipulation instruction is executed, the bank and row address

of the data memory specified directly by the instruction are ORed with the index register. Then, the instruction

is executed in the data memory address specified by the operation result (real address).

Example 1. When the row address of the general-purpose register is 0 for BANK0

MOV

IXL,

#0010B

; IX

← 000000010B

MOV

IXM,

#0000B

; MPE

← 0

MOV

IXH,

#0000B

;

PSW,

#0001B

; IXE

← 1

ADD

03H,

11H

When the above instruction is executed, the contents of the data memory at address 13H and

the contents of the general-purpose register at address 03H are added and the result stored

in the general-purpose register at address 03H.

This means that the ADD r, m instruction performs the OR operation on the address (in the

above case, 11H of BANK0) specified by m and the index register value (in the above case,

000000010B), the result becoming the real address (in the above case, 13H of BANK0). Then,

the instruction is executed at the real address. (See Fig. 8-5.)

Compared to IXE = 0 (Example 1 in Section 8.5.3), the address of the data memory specified

directly by the instruction is modified (OR operation) by the index register.

Example 2. To clear all bank data memories to 0

MOV

IXL,

;

MOV

IXM,

; IX

← 0

MOV

IXH,

;

LOOP:

PSW,

#0001B ; IXE

← 1

MOV

00H,

; Sets data memory specified by IX to 0.

INC

; IX

← IX + 1

AND

PSW,

#1110B ; IXE

← 0; IXE is not modified by IX because the address

; is 7FH.

SKT

IXM,

#0111B ; Is row address 7 reached?

LOOP

; LOOP if not 7

ADD

IXM,

; Specifies the next bank without clearing row address 7.

ADDC

IXH,

;

SKF

IXM,

#1000B ; Were banks cleared up to BANK2?

SKT

IXH,

#0001B ;

LOOP

; LOOP unless cleared

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