UPD17062 datasheet(13/298 Pages) RENESAS

13 / 298 page

µPD17062

1. PINS

1.1

PIN FUNCTIONS

Pin No.

DIP QFP

(GC)

Symbol

Description

Output type

At power-on reset

P0C3

P0C0

P0D3/ADC5

P0D0/ADC2

PWM3

PWM0

VDD

VDD1

VDD0

VCO

GND

GND2

GND1

GND0

PSC

XOUT

XIN

4-bit output port

Input of port 0D and A/D converter

• P0D3 to P0D0

4-bit input port containing a pull-down resis-

tor.

• ADC5 to ADC2

Input of a 4-bit A/D converter, which is a soft-

ware-based successive-approximation type. The

reference voltage is VDD.

Output of a 6-bit D/A converter. The output type

is PWM. Output is done at a frequency of 15.625

kHz. The pin can also be used as a one-bit output

port.

Supplies the power to the device. To enable all

functions, 5 V

±10% is supplied. To operate only

the CPU, 4 V is required. In the clock-stop state,

the voltage can be reduced to 3.5 V.

When the supply voltage increases from 0 V to 4

V, a power-on reset occurs and the program is

started from address 0.

Apply an identical voltage to all pins.

Inputs the signal obtained by dividing the local

oscillation output by the specialized prescaler.

Outputs the PLL error signal. The signal is input

through the external LPF to the local oscillation

circuit.

Grounds the device. Connect all pins to ground.

Outputs the signal to switch the frequency divi-

sion ratio of the specialized prescaler.

Inputs the signal to select the device.

To operate the PLL and IDC, set the input signal

high.

If the input signal is low, the device can be backed

up with a low current drain by executing a stop

instruction.

When the input signal goes high, the device is reset

and the program is started from address 0.

Used to connect a crystal.

An 8-MHz crystal is used.

CMOS push-pull

—

N-ch open drain

—

CMOS tristate

—

CMOS push-pull

—

Undefined

Input

Undefined

—

Input

Hi-z

—

Undefined

Input

—

Input

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