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UPD17062 데이터시트(PDF) 173 Page - Renesas Technology Corp |
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UPD17062 데이터시트(HTML) 173 Page - Renesas Technology Corp |
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173 / 298 page ![]() 171 µPD17062 14. RESET The reset function is used to initialize device operation. 14.1 RESET BLOCK CONFIGURATION Fig. 14-1 shows the configuration of the reset block. Device reset is divided into reset by turning on VDD (power-on reset or VDD reset), and reset by CE pin (CE reset). The power-on reset block consists of a voltage detection circuit that detects the voltage applied to the VDD pin, a power failure detection circuit, and a reset control circuit. The CE reset block consists of a circuit that detects the rising edge of the signal input to the CE pin, and a reset control circuit. Fig. 14-1 Reset Block XOUT XIN VDD CE Power-on clear signal (POC) Reset signal IRES RES RESET STOP instruction R S Q Selector Timer carry FF Timer FF block Power failure detection block Scaler BTM0CY flag read STOP instruction Voltage detection circuit Control register System register Stack Program counter Forced halt by timer carry FF Rising edge detection circuit Timer carry disable FF Reset control circuit |
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