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UPD17062 데이터시트(PDF) 246 Page - Renesas Technology Corp |
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UPD17062 데이터시트(HTML) 246 Page - Renesas Technology Corp |
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246 / 298 page ![]() 244 µPD17062 Sample program Remark The “SET1” or “CLR1” is not included in the µPD17062 instruction set. They are a built-in macro instruction of the 17K series assembler. They set or reset a one-bit flag. If they are written in a source program as shown at *1, they are expanded during assembly as shown at *2. PEEK OR POKE WR, 80H WR, #0010B 80H, WR *1 SET1 IDCDMAEN *2 CLR1 IDCDMAEN PEEK AND POKE WR, 80H WR, #1101B 80H, WR Instruction cycle: 2 s Instruction cycle: 12 s Instruction cycle: 2 s µ µ µ |
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