| 전자부품 데이터시트 검색엔진 |
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ATAM894 데이터시트(PDF) 27 Page - ATMEL Corporation |
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ATAM894 데이터시트(HTML) 27 Page - ATMEL Corporation |
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27 / 97 page ![]() 27 4679D–4BMCU–05/05 ATAM894 6.2.3 Bi-directional Port 5 As all other bi-directional ports, this port includes a bit-wise-programmable Control Register (P5CR), which allows the individual programming of each port bit as input or output. It also opens up the possibility of reading the pin condition when in output mode. This is a useful fea- ture for self-testing and for serial bus applications. The port pins can also be used as external interrupt inputs (see Figure 6-4 on page 27 and Fig- ure 6-5 on page 27). The interrupts (INT1 and INT6) can be masked or independently configured to trigger on either edge. The interrupt configuration and port direction is controlled by the Port 5 Control Register (P5CR). An additional low resistance pull-up/-down transistor mask option pro- vides an internal bus pull-up for serial bus applications. The Port 5 Data Register (P5DAT) is I/O mapped to the primary address register of address '5'h and the Port 5 Control Register (P5CR) to the corresponding auxiliary register. The P5CR is a byte-wide register and is configured by writing first the low nibble and then the high nibble (see section ”Addressing Peripherals” on page 22). Figure 6-4. Bi-directional Port 5 Figure 6-5. Port 5 External Interrupts Master reset Q V DD BP5y (1) Flash options P5DATy I/O Bus D IN enable I/O Bus (1) Switched pull-up Switched pull-down Static pull-up (Data out) S Static pull-down V DD V DD (1) (1) (1) (1) (1) Bidir. Port Data in IN_Enable BP53 P53M2 P53M1 P52M2 P52M1 P51M2 P51M1 P50M2 P50M1 Decoder Decoder Decoder Decoder Bidir. Port Data in IN_Enable BP52 I/O-bus Bidir. Port Data in IN_Enable BP5 I/O-bus Bidir. Port Data in IN_Enable BP5 INT1 INT6 P5CR: 1376 |
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