ATAM894 datasheet(53/97 Pages) ATMEL

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4679D–4BMCU–05/05

ATAM894

Timer 3 – Mode 10: Manchester Demodulation/ Pulse-width Demodulation

For Manchester demodulation, the edge detection stage must be programmed to detect each

edge at the input. These edges are evaluated by the demodulator stage. The timer stage is used

to generate the shift clock for the SSI. The compare register 1 match event defines the correct

moment for shifting the state from the input T3I as the decoded bit into shift register - after that

the demodulator waits for the next edge to synchronize the timer by a reset for the next bit. The

compare register 2 can also be used to detect a time-out error and handle it with an interrupt

routine (see section “Combination Mode 8”).

Figure 6-33.

Manchester Demodulation

Timer 3 – Mode 11: Bi-phase Demodulation

In the Bi-phase demodulation mode, the timer operates like in Manchester demodulation mode.

The difference is that the bits are decoded via a toggle flip-flop. This flip-flop samples the edge in

the middle of the bit-frame and the compare register 1 match event shifts the toggle flip-flop out-

put into a shift register (see section “Combination Mode 9”).

Figure 6-34.

Bi-phase Demodulation

BIT 0BIT 1BIT 2BIT 3BIT 4

BIT 5

BIT 6

Synchronize

Manchester demodulation mode

Timer 3

mode

T3EX

SR-DATA

T3I

CM31 = SCI

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Synchronize

Bi-phase demodulation mode

Timer 3

mode

T3EX

Q1 = SI

CM31 = SCI

SR-DATA

T3I

Reset

Counter 3

Bit 0

ATAM894 데이터시트(PDF) 53 Page - ATMEL Corporation

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