ATAM894 datasheet(39/97 Pages) ATMEL

39 / 97 page

4679D–4BMCU–05/05

ATAM894

6.3.2.3

Timer 2 Output Modes

The signal at the timer output is generated via modulator 2. In the toggle mode, the compare

match event toggles the output T2O. For high resolution duty cycle modulation 8 bits or 12 bits

can be used to toggle the output. In the duty-cycle burst modulator modes the DCG output is

connected to T2O and switched on and off either by the toggle flip-flop output or the serial data

line of the SSI. Modulator 2 also has 2 modes to output the content of the serial interface as Bi-

phase or Manchester code.

The modulator output stage can be configured by the output control bits in the T2M2 register.

The modulator is started with the start of the shift register (SIR = 0) and stopped either by carry-

ing out a shift register stop (SIR = 1) or compare match event of stage 1 (CM1) of Timer 2. For

this task, Timer 2 mode 3 must be used and the prescaler has to be supplied with the internal

shift clock (SCL).

Figure 6-14.

Timer 2 Modulator Output Stage

6.3.2.4

Timer 2 Output Signals

Timer 2 Output Mode 1

Toggle Mode A: A Timer 2 compare match toggles the output flip-flop (M2)

→T2O

Figure 6-15.

Interrupt Timer/Square Wave Generator — the Output Toggles with Each Edge

Compare Match Event

Toggle

RES/SET

Bi-phase/

Manchester

modulator

T2TOP

T2OS2, 1, 0

T2M2

T2O

Modulator 3

OMSK

SSI

CONTROL

TOG2

DCGO

012

Input

Counter 2

T2R

Counter 2

CMx

INT4

T2O

ATAM894 데이터시트(PDF) 39 Page - ATMEL Corporation

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